Ruigu Electronic

How IRQs Enhance Multitasking in Computers

2025-12-13

Interrupt Request (IRQ)

Basic Definition

Interrupt Request (IRQ) is a signal sent by a hardware device or software process to a computer’s CPU, requesting immediate attention to handle a task (e.g., input from a keyboard, data received by a network card, or a timer expiration). IRQs temporarily pause the CPU’s current operations, redirect it to execute a dedicated Interrupt Service Routine (ISR), and then resume the original task once the interrupt is resolved. This mechanism enables efficient multitasking and real-time responsiveness in computing systems.

Core Working Principles

1. Interrupt Signal Generation

Hardware IRQs: Triggered by physical devices (e.g., keyboard, mouse, disk drive, network adapter) via dedicated pins on the CPU or motherboard’s interrupt controller (e.g., PIC, APIC).
Software IRQs: Triggered by programs or the operating system (OS) (e.g., system calls, timer events, or error conditions like division by zero), also known as traps or exceptions.

2. Interrupt Controller Management

Modern systems use an Advanced Programmable Interrupt Controller (APIC) (replacing legacy PICs) to:

Prioritize IRQs (higher-priority interrupts are handled first).
Route IRQs to specific CPU cores (in multi-core systems).
Avoid conflicts (each hardware device is assigned a unique IRQ line or vector).

3. Interrupt Handling Process

Interrupt Trigger: A device/process sends an IRQ signal to the CPU.
CPU Acknowledgment: The CPU pauses its current instruction, saves the program counter (to resume later), and signals the interrupt controller for the interrupt’s source.
ISR Execution: The CPU jumps to the preconfigured Interrupt Service Routine (a small program that handles the interrupt, e.g., reading keyboard input).
Completion & Resume: The ISR finishes, the CPU restores the saved state, and resumes executing the original task.

Types of Interrupts

1. Hardware Interrupts

Maskable Interrupts: Can be temporarily disabled (masked) by the CPU (e.g., IRQs from a mouse or printer) to prioritize critical tasks.
Non-Maskable Interrupts (NMIs): Cannot be disabled—reserved for fatal errors (e.g., memory corruption, hardware failure) that require immediate attention.

2. Software Interrupts

Traps: Intentional interrupts triggered by software (e.g., system calls to access OS services like file I/O).
Faults: Interrupts caused by recoverable errors (e.g., page faults, where the OS loads missing data from disk).
Aborts: Interrupts from unrecoverable errors (e.g., invalid opcode, bus error).

3. Interrupt Prioritization

IRQs are assigned priorities to ensure critical tasks are handled first:

Highest priority: NMIs, hardware faults (e.g., power failure).
Medium priority: Hardware IRQs (e.g., disk I/O, network cards).
Lowest priority: Software traps (e.g., system calls, timer ticks).

IRQ Assignment & Management

1. Legacy IRQ Lines (x86 Systems)

Early PCs used 8 IRQ lines (expanded to 16 with PIC cascading) with fixed default assignments:

IRQ Line	Typical Device
0	System Timer
1	Keyboard
2	PIC Cascade (for IRQs 8–15)
3	COM2/COM4 (Serial Ports)
4	COM1/COM3 (Serial Ports)
5	LPT2 (Parallel Port) / Sound Card
6	Floppy Disk Drive
7	LPT1 (Parallel Port)
8	Real-Time Clock (RTC)
9	ACPI / PCI Devices
10	Network Adapter
11	USB Controller / SCSI Card
12	PS/2 Mouse
13	Math Coprocessor / FPU
14	Primary IDE (Hard Drive)
15	Secondary IDE (Hard Drive)

2. Modern IRQ Management (APIC)

Dynamic IRQ Assignment: The OS (e.g., Windows, Linux) dynamically allocates IRQs to PCI/PCIe devices, eliminating fixed legacy assignments and reducing conflicts.
Message-Signaled Interrupts (MSIs): PCIe devices send interrupts as network packets (instead of physical pins), enabling more flexible IRQ routing and higher scalability.

Key Challenges & Solutions

1. IRQ Conflicts

Legacy Conflicts: Occur when two devices are assigned the same IRQ line (e.g., a sound card and modem sharing IRQ 5), causing hardware malfunctions.
Solutions: Modern OSes use APIC and MSIs for dynamic assignment; legacy systems rely on manual IRQ configuration via BIOS/device manager.

2. Interrupt Latency

Latency: Delay between interrupt trigger and ISR execution (critical for real-time systems like industrial controllers).
Solutions: Prioritization, IRQ affinity (binding IRQs to specific CPU cores), and disabling unnecessary interrupts.

3. Interrupt Storm

Storm: A device sends excessive IRQs (e.g., due to hardware failure), overwhelming the CPU and causing system slowdown/crashes.
Solutions: Interrupt throttling (limiting IRQ frequency) or disabling the faulty device.

Applications of IRQs

1. General Computing

Enables multitasking (CPU handles simultaneous keyboard input, disk I/O, and network traffic).
Supports real-time peripherals (e.g., gaming mice with high polling rates, audio interfaces).

2. Embedded & Industrial Systems

Critical for real-time response (e.g., PLCs handling sensor data in manufacturing, automotive ECUs processing engine signals).

3. Server & Data Center Environments

MSIs and APIC enable high scalability (e.g., handling thousands of network interrupts in a cloud server).

4. Real-Time Operating Systems (RTOS)

Strict IRQ prioritization ensures time-sensitive tasks (e.g., medical devices, aerospace systems) meet deadlines.

IRQ vs. Polling

IRQs are far more efficient than polling (where the CPU repeatedly checks devices for activity):

Feature	IRQ	Polling
CPU Usage	Low (CPU only responds to signals)	High (CPU wastes cycles checking devices)
Responsiveness	Real-time (immediate action)	Delayed (depends on polling frequency)
Use Case	Most modern hardware/software	Legacy devices or simple systems