The synchronization domain (SYNC) of USB is a crucial component of USB data packets. It is used to notify the USB Serial Interface Engine (SIE) that data transmission is about to start and to synchronize the data clocks between the host and the device. The relevant introduction is as follows:
Position in the Data Packet: The synchronization domain follows immediately after the Start of Packet (SOP) domain and before the Packet Identifier (PID) domain. The last two levels in the synchronization domain do not transition (corresponding to logic 1), which are used to mark the end of the synchronization domain and the start of the PID domain.
Encoding and Format: USB adopts Non-Return-to-Zero Inverted (NRZI) encoding. Under NRZI encoding, a level transition represents a logic 0, and no level transition represents a logic 1. For full-speed and low-speed devices, the synchronization domain is 8 bits with a fixed value of 00000001. After NRZI encoding, it becomes a square wave with 7 level transitions, and the last level does not transition. The synchronization domain for high-speed devices is 32 bits, consisting of 31 zeros followed by 1 one.
Working Principle: Since USB operates in an asynchronous transmission mode, the clock frequencies of the host and the device are provided by themselves. After running for a period of time, there will be accumulated errors in the clock frequencies, leading to errors in data interpretation. The synchronization domain starts with a series of zeros. A zero is encoded as a level transition on the USB bus, and each data bit undergoes a level change, making it easy for the serial interface engine to recover the sampling clock signal, thereby achieving data clock synchronization between the host and the device.
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